1. Field of the Invention
This invention relates to a manufacturing method for an isolated semiconductor device by using selective epitaxial growth of semiconductive material.
2. Description of The Related Art
Recently semiconductor integrated circuits such as DRAMs have been developed to satisfy high density by micro-fablication technologies. Accordingly, to prevent a parasitic channel and to minimize a parasitic capacity, it is required to form a thick field isolation layer between a semiconductor device and other semiconductor devices in the integrated circuit and isolate the devices from each other.
As an example of the isolating method, a local oxidation method (LOCOS method) is widely used. However this method is not adequate to make a field isolation in submicron dimensions. Because the field isolation portion is formed by oxidation and the oxidized isolation portion causes birdsbeak which goes into a device region. So this method needs to allow a margin for the birdsbeak.
There is an another example of the isolating method that forms grooves on the field area of the Si substrate, refills a SiO.sub.2 layer into the groove, and then planarizes the surface of the SiO.sub.2 layer. This method is called a BOX method.
This method can isolate devices effectively, but it has a problem, which is formation of crystal defects in the substrate caused by a thermal stress to the substrate. The stress is caused by a difference in thermal expansion coefficients between the SiO.sub.2 layer and the Si substrate. The stress tends to cause excessive leakage currents during the device operation.
To resolve the problems, a method to suppress the excessive leakage currents by using a low stress material such poly Si as refill material, instead of an SiO.sub.2 layer, has been proposed.
This method is to refill the poly Si by the CVD method, after a thin SiO.sub.2 layer has been formed on a whole inner surface of the groove.
According to this method, the stress caused by the difference in thermal expansion coefficients is decreased because most of the material in the groove is poly Si.
However the device formed by the method has to undergo some oxidation steps, for example to make devices, after the refill of the poly Si layer, so there :an be also crystal defects after the steps. This is because a wedge shaped oxidation layer is formed in the upper corner of the groove by the oxidation steps and the wedge shaped oxidation layer causes the crystal defects in the substrate.
If the surface of the SiO.sub.2 layer is below a surface of the substrate and a corner portion of the groove is exposed, this causes a concentration of the electric field at the corner portion of the groove, which decreases the threshold voltage of devices such as MOSFETs formed afterwards and which also makes the threshold characteristic have a hump.
In addition, when the poly Si is oxidized to cover the surface of the poly Si after refill of the trench and the surface of the poly Si is located under the surface of the Si substrate, the oxidation causes an expansion and it leads to a destruction of the grooves because of stress between the oxidized poly Si and the substrate.
In regard to the isolation process using the CVD method, it is difficult to refill a narrower groove and a wider groove simultaneousely and uniformly to the same level in depth.
For example, as shown in FIG. 1(a), the poly Si 100 is deposited on the narrower groove 101 and the wider groove 102 of the substrate 103. 104 is a thermal oxide layer. After the poly Si 100 is etched back so as to expose the surface of the substrate 103, the narrower groove 101 is refilled completely, but the wider groove 102 is not completely filled (FIG. 1 (b)).
FIG. 2 shows another isolating method that refills a thin slit of groove 200 on a substrate 204 with an insulating material 201 (FIG. 2(a)).
In this method, in order to protect the groove, a cap layer 202 made of SiO.sub.2 is formed over the groove. To form the cap layer, a resist pattern 203 is patterned by using a mask alignment technique and is used as a mask to etch SiO.sub.2 202 (FIG. 2(b)). So it needs to predetermine a margin of the alignment error when the cap layer formed.
As explained above, the selective dioxidation method (LOCOS method) has a problem that the birdsbeak goes into the device region and limits the integration.
The BOX method also has a problem that the oxidation between the substrate and the SiO.sub.2 or the poly Si causes the wedge shaped damages and crystal defects to the substrate from the groove. These damages and defects lead to increase excessive leakage currents.
And it is hard to refill the grooves with the insulating materials simultaneously and uniformly to the same level in depth independent from the width of the groove.